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Low Phase Noise Clock Multiplier

Package Information

CAD Model: View CAD Model
Pkg. Type: SOIC
Pkg. Code: DCG16
Lead Count (#): 16
Pkg. Dimensions (mm): 9.9 x 3.9 x 1.5
Pitch (mm): 1.27

Environmental & Export Classifications

Moisture Sensitivity Level (MSL) 3
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

Product Attributes

Lead Count (#) 16
Carrier Type Tube
Moisture Sensitivity Level (MSL) 3
Qty. per Reel (#) 0
Qty. per Carrier (#) 48
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) 0 to 70°C
Accepts Spread Spec Input Yes
Advanced Features Accepts Spread Spec Input
C-C Jitter Max P-P (ps) 36
Core Voltage (V) 3.3
Feedback Input No
Input Freq (MHz) 25 - 25
Input Type Crystal, LVCMOS
Inputs (#) 1
Length (mm) 9.9
MOQ 144
Output Banks (#) 1
Output Freq Range (MHz) 125 - 157.5
Output Skew (ps) 250
Output Type LVCMOS
Output Voltage (V) 2.5V, 3.3V
Outputs (#) 2
Package Area (mm²) 38.6
Period Jitter Max P-P (ps) 60
Period Jitter Typ P-P (ps) 30
Pitch (mm) 1.27
Pkg. Dimensions (mm) 9.9 x 3.9 x 1.5
Pkg. Type SOIC
Prog. Clock No
Published No
Reference Output No
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Spread Spectrum No
Supply Voltage (V) 0 - 0
Tape & Reel No
Thickness (mm) 1.5
Width (mm) 3.9
Xtal Freq (KHz) 25 - 25
Xtal Inputs (#) 1

Description

The IDT613 is a low cost, low phase noise, high-performance clock synthesizer for any applications that require low phase noise and low jitter. It is IDT's lowest phase noise multiplier. Using IDT's patented analog and digital Phase-Locked Loop (PLL) techniques, the chip can accept a 25 MHz crystal or clock input, and produces output clocks up to 157.5 MHz. The chip has separate power supplies for the clock outputs, allowing each output to be run at different voltages. It also allows the core of the chip to operate at 3.3 V, while the output clocks run at either 2.5 V or 3.3 V.