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Renesas Electronics Corporation
DDR5 Register Command Address up to 4800MT/s

Package Information

CAD Model:View CAD Model
Pkg. Type:FCCSP
Pkg. Code:AVG240
Lead Count (#):240
Pkg. Dimensions (mm):13.5 x 8.7 x 0.9
Pitch (mm):0.65

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090
RoHS (5RCD0148HC3AVGI)EnglishJapanese

Product Attributes

Lead Count (#)240
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)170
Pb (Lead) FreeYes
Pb Free Categorye1 SnAgCu
Temp. Range (°C)-40 to 85°C
Comm. InterfaceI2C, I3C
FunctionDDR5 Gen 1.0 Server RCD
Input Voltage Range (V)1.04 - 1.16
Lead CompliantNo
Length (mm)13.5
MOQ170
Pitch (mm)0.65
Pkg. Dimensions (mm)13.5 x 8.7 x 0.9
Pkg. TypeFCCSP
Supply Voltage (V)1.04 - 1.16
Tape & ReelNo
Thickness (mm)0.9
Width (mm)8.7

Description

The 5RCD0148HC2 (RCD) is a registering clock driver used on DDR5 RDIMMs and LRDIMMs. It supports DDR5 server speeds up to 4800 MT/s. Its primary function is to buffer the Command Address (CA) bus, chip selects, and clock between the host controller and the DRAMs. It also creates a BCOM bus to control the data buffers for LRDIMMs.

The 5RCD0148HC2 contains two separate channels with some common logic such as clocking, but otherwise operate independently of each other. Each channel has a 7-bit double data rate CA bus input, a single parity input, two chip-select inputs, produces two copies of 14-bit single data rate CA bus outputs and two copies of the chip-select outputs. The RCD has a common clock input and PLL but produces separate clock outputs to the DRAM channels.