| CAD Model: | View CAD Model |
| Pkg. Type: | LGA |
| Pkg. Code: | LTG24 |
| Lead Count (#): | 24 |
| Pkg. Dimensions (mm): | 4.0 x 4.0 x 1.4 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 24 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 2500 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e4 Au |
| Temp. Range (°C) | -40 to 85°C |
| Advanced Features | Programmable Clock, Reference Output, Spread Spectrum |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3 |
| Architecture | Common, SRNS |
| C-C Jitter Typ P-P (ps) | 46 |
| Core Voltage (V) | 1.8V, 2.5V, 3.3V |
| Family Name | VersaClock 5 |
| Input Freq (MHz) | 1 - 350 |
| Input Type | Crystal (integrated), LVCMOS, LVPECL, LVDS, HCSL |
| Inputs (#) | 2 |
| Length (mm) | 4 |
| MOQ | 2500 |
| NXP Processor Function | Memory Clock, SerDes Clock, CPU/USB/Eth Clock |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 1 - 350 |
| Output Skew (ps) | 75 |
| Output Type | LVCMOS, LVPECL, HCSL, LVDS |
| Output Voltage (V) | 1.8V, 2.5V, 3.3V |
| Outputs (#) | 3 |
| Package Area (mm²) | 16 |
| Phase Jitter Typ RMS (fs) | 700 |
| Phase Jitter Typ RMS (ps) | 0.7 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 4.0 x 4.0 x 1.4 |
| Pkg. Type | LGA |
| Prog. Clock | Yes |
| Prog. Interface | I2C, OTP |
| Published | No |
| Reel Size (in) | 13 |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 1.4 |
| Width (mm) | 4 |
The 5P49V5933 is a programmable clock generator intended for high-performance consumer, networking, industrial, computing, and data communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using an I²C interface. This is Renesas' fifth generation of programmable clock technology (VersaClock® 5). The 5P49V5933, by default, uses an integrated 25MHz crystal as an input reference. It also has a redundant external clock input. A glitchless manual switchover function allows the selection of either input reference during normal operation.
Two select pins allow up to 4 different configurations to be programmed and accessible using processor GPIOs or bootstrapping. The different selections may be used for different operating modes (full function, partial function, partial power-down), regional standards (US, Japan, Europe), or system production margin testing. The device may be configured to use one of two I²C addresses to allow multiple devices to be used in a system.