Product and News Information

Renesas has developed two new series of microcomputers that use the new RX-family CISC CPU. The RX600 series 32-bit devices deliver the fast speed and high performance needed for top-end embedded system products. The RX200 series chips emphasize low power consumption, which is critical for battery-powered systems. The first products to be delivered will be RX600 series microcomputers, samples of which are planned to become available in the second quarter of 2009.

The RX family is a new generation of Renesas microcomputers that essentially combines the best features of our existing 16-bit and 32-bit CISC models, while maintaining upward compatibility with our earlier devices to preserve customers' engineering investments. The RX600 series is designed to meet the feature and performance requirements of future designs for office equipment, digital consumer electronics, whiteware, home appliances, and automotive systems, among others.

The RX CPU core operates at speeds up to 200MHz, has a five-stage pipeline, and uses a Harvard bus architecture that can execute program and data reads in parallel. It achieves excellent processing performance ? more than 1.25MIPS/MHz in the Dhrystone 2.1 benchmark ? and has an instruction set that delivers a better than a 30% improvement in code efficiency compared to previous Renesas models. Microcomputers in the RX family maximize application execution by combining this CPU with on-chip MONOS flash memory that operates at bus speeds up to 100MHz.

A key feature of the eight new devices in the SH7262 and SH7264 groups of 32-bit SuperH RISC microcomputers is a large amount of internal SRAM they provide: 1Mbyte. This memory can be configured as a frame buffer and used as a substitute for external SDRAM, so system designs can be simplified and products can become smaller and lower in cost. For example, these chips make it possible to use a TFT LCD panel display up to WQVGA size (480 x 240 pixels) without any SDRAM for video memory. (In this case, the on-chip SRAM can be used as a frame buffer capable of storing up to two screens.) Alternately, the on-chip SRAM can be employed to store programs or data.

The devices also have enhanced graphics capabilities and new video display functions. They are optimized for applications such as mid-range and low-end digital audio systems and graphical-type electronic automotive dashboards. These microcomputers make it possible to design ? largely with a single chip ? mid-range and low-end products that provide powerful graphics capabilities or TV-display functions. Often the only additional IC needed is a ROM chip for storing programs.

Products in the SH7262 and SH7264 groups have extensive peripheral functions, sufficient for handling many timing, communication, interface, decompression, display-drive, motor-control, and data-conversion tasks, among others. Their SH2A-FPU CPU core with FPU hardware achieves 346 MIPS (Dhrystone 1.1 benchmark) and 288 MFLOPS at the maximum operating frequency of 144MHz. Also, their high ROM code efficiency reduces program sizes and enables the rapid execution of the compression and decompression of audio data in formats such as MP3, WMA, and AAC.

Packages are a 176-pin QFP (SH7262 group) and a 208-pin QFP (SH7264 group).

Ten new 32-bit, 50MHz CISC-type microcomputers (15 part numbers) are spread across the H8SX/1645, H8SX/1635, H8SX/1665, and H8SX/1655 groups. These devices provide two or three improved 10-bit A/D converters, each of which can operate independently and offers a fast, 1.0μs conversion time ? 2.7 times that of the previous models ? for processing higher-frequency signals. They also provide a D/A converter with 10-bit resolution for generating analog signal outputs that are smoother and more precise. Because the on-chip data converters maintain compatibility with the peripherals of previous-generation Renesas microcomputers, it possible to use the same settings employed in products previously built with older chips in enhanced designs that apply the new products. This helps shorten system development times.

Applications for these microcomputers include digital consumer electronic products, office automation equipment, and industrial equipment and systems. The four new groups are the successors to the H8SX/1648, H8SX /1638, H8SX /1668R, and H8SX /1658R groups, respectively, and use the same CPU core for full software compatibility. Also, the 144-pin LQFP or 120-pin or 145-pin LGA packages of each group of devices have the same dimensions and pin layouts as the corresponding predecessors, providing hardware compatibilities that can eliminate the need for circuit-board redesigns.

A maximum of 512Kbytes of flash memory is built into the new microcomputers the in H8SX/1645, H8SX/1635, H8SX/1665, and H8SX/1655 product groups. Moreover, the on-chip flash memory is accessible in one cycle at the devices' 50MHz full-speed operating frequency. That single-cycle memory access capability contributes to fast CPU response for handling interrupts.

Besides the A/D and D/A converters, the new H8SX-series chips provide a comprehensive array of other sophisticated on-chip peripheral functions. For example, the devices in the H8SX/1655 and H8SX/1665 groups include an EXDMA controller that improves data-transfer efficiency, as well as a USB 2.0 Function (Full Speed) interface. The new microcomputers' feature sets allow system designers to build high-functionality end-products at low cost.

To better meet the needs of engineers who are designing tomorrow's advanced vehicle body control systems, the Renesas R8C/Tiny product line now spans a broader range of microcomputers, including new solutions with enhanced functionality. The additional devices in the extended product line are all functionally compatible, making it easier to find the best, most economical solution for any particular set of application requirements. There are 36 models (72 part numbers) in the dozen new product groups ? 16-bit microcomputers with internal flash memory that feature low pin count, small size, and high performance. Among the new models are the 80-pin devices in the R8C/38E group, the 64-pin microcomputers in the R8C/36E group, and the 48-pin chips in the R8C/34E group.

For each of these three packages, devices are arranged into four groups, depending upon whether or not they include a CAN interface and/or provide internal data flash memory, respectively. The data flash memory is a special type of Renesas-developed flash memory that has the extended endurance needed for data storage use. It can reduce system cost and parts count by replacing external EEPROM, and includes a BGO (Background Operation) function that allows the CPU to execute instructions during reads from and writes to the data flash. This improves processing efficiency, simplifies program development, and helps shorten system development times.

One example of the improved peripheral functions that these new R8C/Tiny devices provide is a high-speed on-chip oscillator with greater frequency precision: ±1%, the best in the industry. It allows the elimination of an external resonator, thereby enabling end products that cost less to manufacture. The microcomputers' on-chip voltage detection circuits and data transfer controller also have been improved.

The improved design and high level of integration of the SH-Mobile UL2 application processor (product name: SH7366) facilitate the design of popularly priced mobile phones that incorporate multimedia processing functions previously found mainly in high-end models. The device uses the high-performance SH4AL-DSP CPU core, a superscalar design that can achieve 478MIPS performance at its maximum operating frequency of 266MHz.

The SH-Mobile UL2 chip improves video processing performance for H.264 /MPEG-4 AVC by about 30% compared to previous SH-Mobile series chips, supporting 30fps (30 frames per second) video signal encoding and decoding with a D1-size display (720 × 480 pixels). Its video processing unit can handle a variety of moving-image applications such as video e-mail, video phones, and camcorder-style video clips. Besides the H.264 format, it supports other digital broadcasting systems, including as the DVB-H format used in Europe and the DMB format used in South Korea.

Further, the new application processor contributes to lower system cost by integrating features such as a D/A converter for TV output and a USB 2.0 (high speed) interface for easy connectivity to PCs and other consumer electronic devices. Its small (8mm × 10mm), 284-pin BGA package aids the design of phones that are smaller and more convenient.

To contribute to the rapid development of mobile phones that support high-performance video processing and terrestrial digital broadcast reception, Renesas has developed two new middleware products. One is the Flexible Movie Player video and audio playback software for embedded systems that use the application processors in the SH-Mobile series. The other is the One Segment Terrestrial Digital Broadcast Receiver Middleware for designs that use SH-MobileR application processors.

The Flexible Movie Player middleware incorporates a full hardware accelerator for the H.264/MPEG-4 AVC video compression standard (also called H.264) and controls the synchronization and output of the data decoded by the decoder middleware. Compared to the previous Renesas Video Player Middleware, the new product makes more efficient use of the video processing performance of SH-Mobile devices and adopts the independent AV processing technique.

The new One Segment Terrestrial Digital Broadcast Receiver Middleware supports an expanded range of operating systems, including Windows Automotive as well as μITRON. Big-endian support is also now available, in addition to the little-endian support needed for μITRON. Moreover, error tolerance has been improved to provide better reception in locations where broadcast signals are weak.