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| EEPROMs | |
EEPROMs with I 2 C Interfaces Are Built with a0.35μm Process and Have Capacities up to 512Kbytes and Slim Profiles | |
The R1EX24000A series expands the Renesas range of serial-interface EEPROMs, offering significantly improved specifications for primary parameters such as reliability and the number of rewrite cycles. Nine new devices with an I 2 C bus interface launch the series, which is produced using a 0.35μm process. They have capacities from 2Kbits up to 512Kbits. To aid customers' efforts to miniaturize their products, we now offer EEPROM devices that are packaged in a wafer-level CSP. | |
The photographs on the left and center show EEPROMs in SOP and TSSOP packages, respectively. The one on the right shows an R1EX24000A-series device in a much-smaller wafer-level CSP. (All devices are shown to scale). | |
| Meeting the demand for large-capacity EEPROMs for mobile-phone and fingerprint-identification applications | |
EEPROM chips, which are widely used to store the program for small applications, have many other uses as well. For many years they have been used for storing version-control information or calibration data that is specific to a particular device or system. A notable trend has been to use EEPROM in new areas such as modules for mobile phones or fingerprint-identification equipment. As a result, the number of EEPROM devices that Renesas ships continues to increase. Feature-size reduction in semiconductor manufacturing is a key factor in determining the size and performance of EEPROM chips, and Renesas has developed the technology needed for full-scale production using a 0.35μm process. To shrink the size of packaged devices, we offer wafer-level CSP packages that enable slim-profile components. Also, we have already established a long track record as a reliable supplier of EEPROM devices that have an SPI bus serial interface. In fact, Renesas is the only supplier in Japan with an EEPROM product range that extends from small to large sizes, and we supply sample programs that are downloadable at no cost from a web site. Now, with the commercialization of our 0.35μm process technology, we are introducing new ranges of EEPROM products that emphasize features like smaller size and higher performance. And because mobile-phone, fingerprint-identification and other applications require larger amounts of storage than previously have been the norm, we are offering chips with greater capacities. The first products being introduced are nine EEPROM models in the R1EX24000A series with capacities from 2Kbit (R1EX24002A) to 512Kbit (R1EX24512A) ? devices that have an I 2 C* bus serial interface (see Table). The new EEPROMs are in addition to existing models that support the SPI interface. An important design characteristic for EEPROMs is the maximum number of times that data can be written into them, a characteristic sometimes called "endurance." In the new devices, the number of write cycles has been improved by an order of magnitude: from 100,000 to 1,000,000 cycles. Another improvement is a reduction in the write time: from 10ms to 5ms. Further, the new models still maintain a small package size with a slim profile. It should be pointed out that typically there is an inverse relationship between process miniaturization and the maximum number of write cycles. That is, as the process gets smaller, endurance drops. In new Renesas EEPROMs, though, the smaller 0.35μm production process has resulted in greater durability, while design optimization of the power supply circuit has enabled higher speed operation. | |
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| EEPROM can be delivered in a number of different packages, including an ultra-small wafer-level CSP | |
Our existing EEPROM products and the devices in the R1EX24000A series are currently are available in SOP-8 and TSSOP-8 packages. The fabrication of a wafer-level CSP involves rewiring on the chip to form bumps on the copper posts, then encasing the chip's surface in resin, in the same way as a traditional package. Additionally, we are working to make EEPROMs available in the future in the ultra-slim wafer process package (WPP) format. WPP packages are encased in polyimide instead of resin, and have a device structure that allows for even slimmer profiles. A feature shared by the wafer-level CSP and WPP packages is that they combine small size with a slim profile. For example, whereas the SOP -8 and TSSOP lead-frame type packages have a height of 1.73mm and 1.1mm respectively, the wafer-level CSP is less than half as high: 0.48mm. The WPP is thinner still: as little as 0.3mm high (see Figure, left side). WPP EEPROMs can be supplied as a wafer with bumps, or as a bare- wafer front-end (processing only). Technology for producing EEPROMs is constantly being advanced at Renesas. On the horizon is the prospect of further miniaturization with the introduction of a 0.18μm process. Also, we aim to provide long-term support and further improve reliability, thereby expanding sales into the industrial, automotive, and other market sectors. * I 2 C is a trademark of Philips Corporation | |
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